{"schema":"hottub-news/story/v1","story":"st_b3fsvnpyh7vrr2sr4kmq","title":"AMD openSIL Achieves Its Production Goal With 6th Gen EPYC \"Venice\"","title_en":"AMD openSIL Achieves Its Production Goal With 6th Gen EPYC \"Venice\"","outlets":3,"brief":null,"page":"https://hottub.news/stories/amd-opensil-achieves-its-production-goal-with-6th-gen-epyc-venice-b3fsvnpyh7","count":3,"items":[{"id":"n_7mmeuv7vcqmchzywqkaa","seq":11275003,"kind":"article","title":"AMD adopte openSIL pour démarrer ses serveurs EPYC Venice","url":"https://www.linformatique.org/amd-epyc-venice-opensil-micrologiciel","published":"2026-11-15T09:42:00Z","seen":"2026-11-15T10:56:25Z","lang":"fr","source":{"id":"linformatique.org","name":"linformatique.org","domain":"linformatique.org"},"via":"gdelt-gkg-translingual","topics":["technology","economy"],"authors":["Antoine Mercier"],"story":"st_b3fsvnpyh7vrr2sr4kmq","category":"science-technology","category_p":0.7900000214576721,"sentiment":"neutral","tone":0.17000000178813934,"political":0.12999999523162842},{"id":"n_gellrb5f26af3zif2jia","seq":11070152,"kind":"article","title":"AMD openSIL Achieves Its Production Goal With 6th Gen EPYC \"Venice\"","url":"https://lxer.com/module/newswire/ext_link.php?rid=369193","summary":"Since 2023 I and many open-source advocates have been very eager for AMD's openSIL project for delivering open-source CPU silicon initialization as a replacement to the traditional AGESA code. With Zen 5 there was proof-of-concept support that we have enjoyed with Coreboot on an MSI Ryzen motherboard and a Gigabyte EPYC server motherboard thanks to the Coreboot-based Dasharo ports by 3mdeb. The…","published":"2026-11-14T13:57:00Z","seen":"2026-11-14T13:57:00Z","lang":"en","source":{"id":"kite-lxer-com-0a4999","name":"lxer.com","domain":"lxer.com","outlet":{"wikidata":"Q132659075","name":"LXer","type":"website","designations":["news aggregator","website"]}},"via":"kite-lxer-com-0a4999","topics":["linux-oss"],"entities":[{"id":"Q128896","name":"AMD","type":"org"},{"id":"Q33083031","name":"AMD EPYC","type":"other"},{"id":"Q773853","name":"Venice","type":"other"}],"story":"st_b3fsvnpyh7vrr2sr4kmq","category":"science-technology","category_p":0.8700000047683716,"sentiment":"positive","tone":0.5199999809265137,"political":0.05999999865889549},{"id":"n_b3fsvnpyh7vrr2sr4kmq","seq":10834673,"kind":"article","title":"AMD openSIL Achieves Its Production Goal With 6th Gen EPYC \"Venice\"","url":"https://www.phoronix.com/news/AMD-openSIL-Venice-Goal","summary":"Since 2023 I and many open-source advocates have been very eager for AMD's openSIL project for delivering open-source CPU silicon initialization as a replacement to the traditional AGESA code. With Zen 5 there was proof-of-concept support that we have enjoyed with Coreboot on an MSI Ryzen motherboard and a Gigabyte EPYC server motherboard thanks to the Coreboot-based Dasharo ports by 3mdeb. The goal for production readiness was for Zen 6, but with this week's EPYC 9006 SP7…","published":"2026-11-13T18:20:29Z","seen":"2026-11-13T19:52:43Z","lang":"en","source":{"id":"kite-phoronix-com-320268","name":"phoronix.com","domain":"phoronix.com","outlet":{"wikidata":"Q4046864","name":"Phoronix","type":"website","designations":["news website"]}},"via":"kite-phoronix-com-320268","topics":["linux-oss"],"authors":["Michael Larabel"],"story":"st_b3fsvnpyh7vrr2sr4kmq","category":"science-technology","category_p":0.8700000047683716,"sentiment":"positive","tone":0.5199999809265137,"political":0.05999999865889549}]}